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Non-Volatile Dynamic Random-Access Memory Cell With Built-In Boosting

IP.com Disclosure Number: IPCOM000064648D
Original Publication Date: 1985-Aug-01
Included in the Prior Art Database: 2005-Feb-19

Publishing Venue

IBM

Related People

Authors:
Kauffmann, BA Lam, CH [+details]

Abstract

This non-volatile dynamic random-access memory (NVRAM) cell features an integrated voltage-boosting capacitor in the cell structure without increasing the cell layout area and eliminates the need for an on-chip storage plate charge pump. By incorporating the storage plate boosting capacitor into the cell, not only was the charge pump layout area eliminated but it also simplified the operation, timing and circuits required for the retrieval of non-volatile data. During the dynamic operation of the cell and during storage of data, the boost plate voltage (VBST) is actively held to ground (A and C up (timing sequence T5-T1)). When retrieving data, the storage plate voltage (VSP) is required to go from VDD to approximately VDD+1.