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Self-Aligning Multi-Depth Trenches

IP.com Disclosure Number: IPCOM000064675D
Original Publication Date: 1985-Aug-01
Included in the Prior Art Database: 2005-Feb-19

Publishing Venue

IBM

Related People

Authors:
Acker, CP [+details]

Abstract

A technique compatible with advanced bipolar processing is provided to obtain both deep and shallow isolation trenches. Self-aligning multi- depth trenches eliminate partitioning of the epitaxy 11 on a word line while keeping the subcollector 12 contiguous (Fig. 1). The technique reduces hole injection, bit line capacitance and cell size. The procedure for obtaining the multi-depth trenches on a semiconductor chip is as follows: 1. Define the deep trench (photolithography). 2. Use reactive ion etch (RIE) or other suitable etching process to etch the deep trench 14. (Other processing may be done after this step - e.g., Channel Stop Ion Implant.) 3. Remove the photoresist 13 (Fig. 2) and fill the trench 14 with a suitable material (temporary or permanent filling). 4. Define the shallower trenches 15 (Fig. 3).