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Linear Algorithm for Controlling Information in a Circuit

IP.com Disclosure Number: IPCOM000064690D
Original Publication Date: 1985-Aug-01
Included in the Prior Art Database: 2005-Feb-19

Publishing Venue

IBM

Related People

Authors:
Berman, LC Joyner, WH Trevillyan, L [+details]

Abstract

Applications of optimization techniques based on global flow analysis to the automated design of logic are described. In particular this article is directed to the design of control logic in master-slice technologies. Previous optimization work on logic design has relied primarily on either local transformations on the circuit graph or on the use of two-level boolean minimization. The described methods involve linear time algorithms which extend the scope of local optimizations to the entire design. Their use, in some cases, has resulted in a reduction in gate count, in improved control over path length, and in better detection and elimination of redundancy. Current techniques for automatic design of control logic fall into two broad categories.