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Data/Test-Controlled Memory Architecture for Supercomputers Disclosure Number: IPCOM000064701D
Original Publication Date: 1985-Aug-01
Included in the Prior Art Database: 2005-Feb-19

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Chang, RW Troutman, BC [+details]


In a conventional computer memory, the selection and modification of memory index registers is controlled only by instructions. Such an architecture works well for a conventional computer, but is inefficient for a supercomputer that contains many processors and memory units, particularly when the operations involve decision-making processes. An architecture, EXTEN, shown in Fig.