Compatible Current Switch Logic Circuit and Voltage Regulators
Original Publication Date: 1985-Aug-01
Included in the Prior Art Database: 2005-Feb-19
This article describes a current switch (CS) logic circuit that is compatible with the devices, logic levels and circuits employed on a high performance CSEF (current switch/emitter follower) logic masterslice. Compensated reference voltage and current source bias voltage regulators, compatible with the devices in the CSEF masterslice logic cell, are also provided in support of the disclosed CS circuit. This 2.7 mW circuit has a nominal delay of 192 ps, which is comparable to a 7.8 mW CSEF circuit at a fanout of 1, and a delay of 421 ps, which is comparable to a 3.0 mW CSEF circuit at a fanout of 4, an improvement of from 10% to 65% in the power delay product. The CSEF to CS logic interface is conveniently handled by connecting the CSEF collector to the CS input base.