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Three Methods of Character Select for SRAM Variable Write-Word-Length Memory

IP.com Disclosure Number: IPCOM000064861D
Original Publication Date: 1985-Sep-01
Included in the Prior Art Database: 2005-Feb-19

Publishing Venue

IBM

Related People

Authors:
Matick, RE Schuster, SE [+details]

Abstract

This article discloses three methods of adding a character select feature to a standard field-effect transistor (FET) type of random-access memory (SRAM) in order to provide character-writing capability to a cache or memory system which is otherwise organized to write words. The modifications are illustrated using a specific processor organization, but the concepts are applicable to any cache or main memory system requiring selective character-write capability.