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Variable Inverse Gain NPN Transistor Disclosure Number: IPCOM000064862D
Original Publication Date: 1985-Sep-01
Included in the Prior Art Database: 2005-Feb-19

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Bhatia, HS Bhatia, SS Montillo, FJ [+details]


The disclosure describes a new design for the base region of an NPN transistor that produces variable inverse gain in the unit. Contemporary NPN transistors have a fixed gain that is fabricated into the product. This new design does not alter the forward gain of the transistor that is part of the conventional design and fabrication. The variable inverse gains are achieved by 1) varying the ratio of intrinsic to extrinsic base areas and 2) optimizing the shape of the base profile so that the injection efficiency in the inverse direction is increased. The range of variable gain is limited by the depth of doping allowed by the fabrication process or the device dimensions, whichever produces the limits. The new technique disclosed is useful, also, in the production of PNP transistors and is not limited to NPN devices.