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Noise Control During Integrated Circuit Logic Chip Testing

IP.com Disclosure Number: IPCOM000064871D
Original Publication Date: 1985-Sep-01
Included in the Prior Art Database: 2005-Feb-19

Publishing Venue

IBM

Related People

Authors:
Cha, CW Culican, EF Graf, MC [+details]

Abstract

Integrated circuit chips often test out faulty because the large unbypassed inductance of the test fixture causes off-chip driver switching noise to be fed back to the logic chip power supply, thereby changing the chip's logic state. Disclosed is a method for applying test patterns to the logic chip in a manner which minimizes off-chip driver switching. The method involves precharging the tester termination to the predicted logical state of the off-chip drivers for a given input test pattern. The figure illustrates a logic chip 1 having input receivers 2, a logic network 3, output latches 4 and off-chip drivers 5. In the test environment, drivers 5 drive a large unbypassed inductance 6 of tester 7.