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Dichlorosilane RP Epi Process Optimization

IP.com Disclosure Number: IPCOM000064908D
Original Publication Date: 1985-Sep-01
Included in the Prior Art Database: 2005-Feb-19

Publishing Venue

IBM

Related People

Authors:
Kulkarni, SB Szeparowycz, GJ [+details]

Abstract

In epitaxial growth process for advanced bipolar transistors, the reduced pressure (RP) epi growth for silicon tetraacetic takes place at 1150CC. Boron autodoping limits the yields at pressures below the optimum pressure. This proposal is to grow epi at lower temperatures using dichlorosilane at approximately 1050-1080ŒC. Optimum pressures are lowered significantly and the combination of lower temperature and pressure is found beneficial to performance and yield. A typical transistor chain LLY enhancement from point "C" to "D" in the figure is about 10-14%. "S/C to ISO area ratio" refers to the ratio of the arsenic-doped area to the boron-doped area in the surface of the substrate prior to epitaxial layer growth on the substrate.