Browse Prior Art Database

Processor Software Status Indicator

IP.com Disclosure Number: IPCOM000064962D
Original Publication Date: 1985-Oct-01
Included in the Prior Art Database: 2005-Feb-19

Publishing Venue

IBM

Related People

Authors:
Marshall, JR [+details]

Abstract

In a processor with read-only memory (ROM), extra bits are included, in each memory word, with bit patterns to identify blocks of code or critical instructions. These extra bits are routed to a bank of light- emitting diode (LED) status indicators which visibly indicate the block or instruction being executed. If the processor halts on a disabling error condition, the LEDs show the last block or instruction accessed, prior to entering any error recovery routing. No processor intervention is required to enable or disable status indication. The figure shows that N ROM bits assigned to the status indicator are routed, by lines 3, from ROM 1 to the inputs of latch register 2, which is a bank of flip-flops. Each flip-flop drives a corresponding status indicator LED 4.