Browse Prior Art Database

LSI Macro Packaging

IP.com Disclosure Number: IPCOM000064963D
Original Publication Date: 1985-Oct-01
Included in the Prior Art Database: 2005-Feb-19

Publishing Venue

IBM

Related People

Authors:
Nestork, WJ [+details]

Abstract

In order to provide a high level of large-scale integrated (LSI) components to system users, it would be highly desirable to design and qualify both custom and masterslice macros and then make them available in catalog form to allow users to mix and match macros on a chip. The drawing illustrates a design of structured and symmetrical set of "parts." This can be accomplished with minimal turnaround time by utilizing a single-chip size, single-module layout and a fixed test probe system. The illustrated "parts" include a random access memory (RAM), a microprocessor (MP), a read only store (ROS) and a masterslice (MS) with integrated off-chip drivers (OCDs).