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Cost-Reduced Multilayer Ceramic Module

IP.com Disclosure Number: IPCOM000064980D
Original Publication Date: 1985-Oct-01
Included in the Prior Art Database: 2005-Feb-19

Publishing Venue

IBM

Related People

Authors:
Fritz, RA [+details]

Abstract

A family of multilayer ceramic modules providing required I/O pin connections and with cost reduction features is described. Each module shall have the metalization layer on the second from the top ceramic surface, with the I/O pins being impressed through the center two layers of ceramic. The metal layer is in electrical contact with the tops of the I/O pins. The metalization layer is covered with the top layer of ceramic. The metalization layer is contained within a ceramic cavity. I/O pin mechanical attachment is by means of a braze to the second from the bottom layer of ceramic. The bottom layer of ceramic will have wells provided to allow braze clearance for the braze pads on the second layer of ceramic.