Browse Prior Art Database

Microprocessor Self-Testing Technique

IP.com Disclosure Number: IPCOM000065036D
Original Publication Date: 1985-Oct-01
Included in the Prior Art Database: 2005-Feb-19

Publishing Venue

IBM

Related People

Authors:
Iverson, JH Reetz, DD [+details]

Abstract

This test technique provides a functional speed self-test of certain microprocessor logic parts using conventional static test equipment. In addition, the technique may be expanded upon for use during the hardware development qualification phase to characterize interface timing behavior. The functional speed self-test and interface timing test techniques described allow the static tester and the microprocessor to work together, in a manner which is natural to both, to perform a realistic tests of the module and its interfaces. The self-test technique can be used to provide most or all of the logic and array test patterns at any package level, or to augment traditional stuck fault and array test patterns.