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Shift Unit Lay-Out Disclosure Number: IPCOM000065285D
Original Publication Date: 1985-Nov-01
Included in the Prior Art Database: 2005-Feb-19

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Desrosiers, B Peter, JL Sitbon, C Steimle, A [+details]


The subject shift unit is a 4n-bit shifter which can perform 0 to 7 hexadecimal digit shifts left or right. Zeroes are introduced at the right when a left shift is performed and at the left when a right shift is performed. This shift unit comprises three stages: one stage for performing a one-digit shift, one stage for performing a two-digit shift, and one stage for performing a four-digit shift. Each stage comprises two-way NAND gates arranged in three levels, as shown in Fig. 1. In each stage, one level is devoted to the right shift, one level to the left shift, and one level to no shift.