Browse Prior Art Database

Submicron-Gate Self-Aligned Gallium Arsenide FET Fabrication

IP.com Disclosure Number: IPCOM000065310D
Original Publication Date: 1985-Nov-01
Included in the Prior Art Database: 2005-Feb-19

Publishing Venue

IBM

Related People

Authors:
Jambotkar, CG Renbeck, RB [+details]

Abstract

This article discloses fabrication of a fast-switching GaAs FET (field effect transistor). The final GaAs FET structure obtained is shown in Fig. 14. Element 18 represents a Schottky gate of submicron length with N+ source/ drain regions 22 being precisely located about 0.3 mm from its edges. N-type region 4 has a doping level which can be suitably adjusted for either enhancement mode or depletion mode MESFET (metal Schottky FET) operation. Element 24 represents the optional isolation region, and element 28 represents the metallization system for ohmic contacts to source/drain and device interconnections. It also optionally contacts gate 18 outside the active device region so as to lower the series resistance of the gate interconnection.