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Stopped State Definition in a Microprocessor System

IP.com Disclosure Number: IPCOM000065417D
Original Publication Date: 1985-Dec-01
Included in the Prior Art Database: 2005-Feb-19

Publishing Venue

IBM

Related People

Authors:
Johnson, WM Wright, CG [+details]

Abstract

The present invention relates to a processing system consisting of a microprocessor unit and one or more storage interface units and I/O interface units connected to a common bus. The invention is a technique for stopping operations on said bus, during which time a supervisory device may carry out transactions with any of the units connected to the common bus for the purpose of testing or diagnostics. After the testing or diagnostic operations are complete, normal system operation may resume with no side effects. The Stop function is accomplished using bus enable signals which are already present; no extra signals are required. The figure shows the timing signals associated with the common bus, and illustrates the time at which information is valid on the bus.