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Clock Synchronizer With Means to Disable Frequency Change During Periods With No Transition in the Data Waveform Disclosure Number: IPCOM000065536D
Original Publication Date: 1985-Dec-01
Included in the Prior Art Database: 2005-Feb-19

Publishing Venue


Related People

Askin, HO Boerstler, DW [+details]


In some systems for encoding data serially, binary logic values are represented by the presence or absence of a transition in an electrical or optical signal at a clock time in the data waveform. At a receiving station, a local clock is synchronized with the transitions in the data waveform, and the local clock signal is used by circuits that decode the waveform. These codes commonly limit the number of clock times that can occur without a transition. When the local clock is synchronized with the data waveform clock, either transition in the data waveform coincides with a downward transition in the local clock. Thus, when the local clock leads the data waveform clock, the local clock is down during a data transition; and when the local clock lags the data waveform clock, the local clock is up during a data transition.