A Novel Method to Fabricate Merged RC-Networks
Original Publication Date: 1985-Apr-01
Included in the Prior Art Database: 2005-Feb-19
This article describes a method of reducing the area and para- sitic capacitance of parallel RC-networks by merging the resistor and the capacitor. Conventional technology has the resistor and capacitor layed out separately and the parallel connection is made by metal connections. This limits the degree in freedom to reduce the parasitic capacitance, particularly the distributed capacitance between epitaxy and substrate.