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Shift Register Between An Array And/or Array Modified For Use As Product Term Wire Selection Circuit For Personalizing A PLA By Selective Burn Out Or Crosspoint Elements

IP.com Disclosure Number: IPCOM000065688D
Original Publication Date: 1985-Jun-01
Included in the Prior Art Database: 2005-Feb-19

Publishing Venue

IBM

Related People

Authors:
Wu, WW [+details]

Abstract

An additional transistor is provided for each stage of the shift register that interconnects the product term wires of the AND array and the corresponding wires of the OR array, and its collector terminal is connected to the Set input of the latch and its emitter is connected to the complement output of the latch. A common connection to the base terminals of the transistors normally carries a reverse bias voltage that disables these transistors and permits normal operation of the PLA. For personal- izing thePLA burning out components at the array crossover points, these transistors are all given a forward biasing base voltage, and the shift register is loaded with a data pattern to set one of the register latches and to reset the others.