Browse Prior Art Database

Ram Partial-good Scheme

IP.com Disclosure Number: IPCOM000065689D
Original Publication Date: 1985-Jun-01
Included in the Prior Art Database: 2005-Feb-19

Publishing Venue

IBM

Related People

Authors:
Doerre, GW [+details]

Abstract

A RAM partial-good scheme is designed for use in a memory system where address reconfiguration has been implemented to eliminate bad memory bits. This scheme allows the efficient use of partial-good memory chips withthe addition of minimal on-chip circuitry.