Browse Prior Art Database

1D Cell Memory System With Pulsed Storage Plate for Multiplexed Bit Lines

IP.com Disclosure Number: IPCOM000065692D
Original Publication Date: 1985-Jun-01
Included in the Prior Art Database: 2005-Feb-19

Publishing Venue

IBM

Related People

Authors:
Brigida, DJ [+details]

Abstract

This article describes a technique which, by pulsing the storage plate, connects as many bit lines as loading will allow to the same sense amplifier without the problem of sensing one signal, latching the signal, writing it back, restoring it, sensing the next signal, etc., because all cells on the word line develop signals.