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Bidirectional Interface Test Circuit

IP.com Disclosure Number: IPCOM000065822D
Original Publication Date: 1985-Aug-01
Included in the Prior Art Database: 2005-Feb-19

Publishing Venue

IBM

Related People

Authors:
Chorpenning, J [+details]

Abstract

A technique is described whereby a bidirectional buffer and latch circuit is incorporated within a system interface card so as to perform testing functions required to insure that circuit drivers, receivers, signal paths and parallel cables are functioning properly. The circuit remains an integral part of the system, insuring greater reliability. The interface card is used to enable the IBM Personal Computer to connect to a host computer, such as the IBM Series/1. In prior art, testing of drivers, receivers and signal paths required extensive testing equipment to insure complete functionality. However, because of a limited number of test points on the interface card, the tests were limited.