Browse Prior Art Database

Interconnection for Bubble Memory Package

IP.com Disclosure Number: IPCOM000066021D
Original Publication Date: 1979-Jan-01
Included in the Prior Art Database: 2005-Feb-19

Publishing Venue

IBM

Related People

Authors:
Foster, RA [+details]

Abstract

Input/output (I/O) printed-circuit (PC) pads 1 are located about the periphery of the planar surfaces of substrate 2, carrying one or more bubble memory chips (not shown). The X and Y rotational field coils 3, 4 are wrapped orthogonally about substrate 2 in spaced groups Gx, Gy of equal numbered turns. Each group is located between pairs of the peripheral I/O pads, for example, group 5 of X coil 3 in partially shown top view.