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Self-Aligned Submicron Almost Ideal Transistor

IP.com Disclosure Number: IPCOM000066036D
Original Publication Date: 1979-Jan-01
Included in the Prior Art Database: 2005-Feb-19

Publishing Venue

IBM

Related People

Authors:
Wieder, AW [+details]

Abstract

The ideal transistor is a minimum size, fast switching device with high and current independent current gain, which can be realized with a minimum number of well-defined and controlled processing steps. The process should rely on self-aligned processing steps with no critical alignment. The critical considerations and calculations show that such a structure has to meet the following requirements: 1. Self-aligned process (all levels), minimum dimensions (speed, yield) 2. Zero extrinsic base resistance. circular contact (speed) 3. The compensated emitter region (constant current gain, yield) 4. Gettering capabilities within emitter region (yield) 5. High lifetime in emitter region (constant current gain, yield) 6.