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The driver circuit shown in the drawing has three stable states of operation: (a) up-level state (b) down-level state Logical operation (c) high impedance state.
English (United States)
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High Impedance State Driver With TotemPole Outputs
The driver circuit shown in the drawing has three stable
states of operation:
(a) up-level state
(b) down-level state Logical operation
(c) high impedance state.
Logical Driver Operation: To logically operate the subject driver, the high
impedance state input T is set to the zero state (about 0.6 V). If logical input A
equals 1, T1 must conduct, keeping T2 off and supplying base current to T3,
hence A equals Phi (about 0.6 V). For A equals 0, urn T1 must turn off;
therefore, T3 cannot conduct. The value of R3 is chosen such that a high current
spike is generated, insuring high speed performance for up-going transients to
high capacitive loads and A equals 1 (about 2.4 V).
High impedance state operation (HISD): The object of operating in this mode
is to isolate the driver from any possible collector dotting, i.e., prevent T2 or T3
from conducting catastrophic current flow to the collector dot. For HISD
operation, T=l, independent of the logical input level.
When T=1, T2 and T3 cannot conduct because the conduction of T4 and T5
does not allow any current to flow into the bases of T2 and T3. We now have a
push/pull output which cannot conduct current; therefore, it may be employed in
a collector dot.
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