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Procedure To minimize Contamination and Defects

IP.com Disclosure Number: IPCOM000066052D
Original Publication Date: 1979-Jan-01
Included in the Prior Art Database: 2005-Feb-19

Publishing Venue

IBM

Related People

Authors:
Gardiner, JR Riseman, J Shepard, JF [+details]

Abstract

In state-of-the-art fabrication techniques for semiconductor devices, halogens are often incorporated in high temperature processing to eliminate or minimize contaminants which cause electrical instabilities or defects in the resulting structure. This is particularly true for the growth of ultra-clean SiO(2) layers and has also been shown to be effective for CVD (chemical vapor deposited) layers such as SiO(2), Si(3)N(4) and polysilicon (*). In some cases the use of HCL or a halogen containing species in a nonoxidizing ambient is not feasible, e.g., where the process step is carried out at greater than 900 degrees with bare silicon exposed. This sort of treatment would likely cause chemical attack of the exposed silicon.