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Power System Control and Error Display Circuits

IP.com Disclosure Number: IPCOM000066063D
Original Publication Date: 1979-Jan-01
Included in the Prior Art Database: 2005-Feb-19

Publishing Venue

IBM

Related People

Authors:
Rice, AJ [+details]

Abstract

This is a control and error display circuit for a power system. Error detectors (not shown) are used to detect error conditions, such as over voltage, over current, under voltage, and thermal error, occurring within the power system. These detectors, providing a binary 1 for each error detected, are connected to a scanner which scans them sequentially. The scanner output is connected to an error latch FL which stores a binary 1 whenever an error condition is detected. Under normal conditions, a clock CK is used to increment a scanner address counter CNTR. This clock may also be disconnected from CNTR input under the control of FL output.