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Testing Large Computer Designs Disclosure Number: IPCOM000066183D
Original Publication Date: 1979-Jan-01
Included in the Prior Art Database: 2005-Feb-19

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Roth, JP [+details]


A method of Logic design is given, using regular design, which makes possible the test of very large designs, e.g., the size of a LEM (liquid encapsulated module), using state-of-the-art test generators. The method differs from (1,2) in that it does not require LSSD (level sensitive scan design) for each output and input. Furthermore, tests generated by the D-algorithm will be only for macros.