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Process For Realization Of Submicron Geometries

IP.com Disclosure Number: IPCOM000066273D
Original Publication Date: 1979-Feb-01
Included in the Prior Art Database: 2005-Feb-19

Publishing Venue

IBM

Related People

Authors:
Deines, JL Gdula, RA Revitz, M [+details]

Abstract

It is possible to attain submicron large-scale integration geometries without relying on submicron lithographic techniques. The technique depends upon the deposition of doped chemical vapor deposited silicon dioxide or silicon. A thin column of this material, which is to act as a diffusion source, is then formed by utilizing the directional etching characteristic of reactive ion etching (RIE) on a structure consisting of the doped material covering a suitable mandrel or form. All the doped material is removed except that material which is conformal to the mandrel. The column of doped material whose dimensions are accurately controlled with the thickness of the deposited layer is then used as the diffusion source.