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Method For Making Three Dimensional Microstructures in Silicon, Particularly a Buried Oxide Structure For Bipolar Integrated Circuits

IP.com Disclosure Number: IPCOM000066372D
Original Publication Date: 1979-Feb-01
Included in the Prior Art Database: 2005-Feb-19

Publishing Venue

IBM

Related People

Authors:
Blum, JM Ning, TH Yu, HN [+details]

Abstract

Conventional techniques for etching silicon, such as reactive ion etching, ion milling, isotropic or anisotropic etching, are capable of making vertical or near vertical walled holes or trenches only. These techniques cannot be used to dig "tunnels" which are required to make truly three dimensional microstructures.