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Self Registering Metal To Polysilicon Contacting Technique

IP.com Disclosure Number: IPCOM000066373D
Original Publication Date: 1979-Feb-01
Included in the Prior Art Database: 2005-Feb-19

Publishing Venue

IBM

Related People

Authors:
Rideout, VL [+details]

Abstract

An improved method is disclosed that provides self registering metal-to- polysilicon contacts for a single polysilicon process referred to as the GATE/PLATE technique (1,2). Top and side views of a one device memory cell made using the GATE/PLATE technique are shown in Fig. 1. The cell is characterized by a self registering metal line to polysilicon gate contact. The metal word line that connects to the FET gate passes over and is insulated from the polysilicon capacitor electrode or "plate". However, the capacitor plate must be contacted by a metal bias line at some point on the chip. The means for providing the plate connection is the basis of this article.