Browse Prior Art Database

Timer Subsystem For A Minicomputer

IP.com Disclosure Number: IPCOM000066463D
Original Publication Date: 1979-Mar-01
Included in the Prior Art Database: 2005-Feb-19

Publishing Venue

IBM

Related People

Authors:
Agnew, PW Albert, AJ [+details]

Abstract

One of the complicating factors in the implementation of a complex computer system is the inclusion of asynchronous features, such as timers, which take relatively little microcode time, but which must constantly be allowed for either in periodic checks by the microcode or by the inclusion of special hardware. A simplifying approach to the system design is to build a computer from a number of "Functional Units" each possessing its own engine and storage arrays, either random access memories or read-only memories (ROMs), and connected by a common "System Bus". Each of the Functional Units then performs its own relatively simple task and communicates with the others as the need arises.