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Redundancy Scheme For Logic Chips

IP.com Disclosure Number: IPCOM000066747D
Original Publication Date: 1979-Apr-01
Included in the Prior Art Database: 2005-Feb-20

Publishing Venue

IBM

Related People

Authors:
Remshardt, R Schettler, H Schumacher, H Zuehlke, R [+details]

Abstract

Redundancy is an efficient means for increasing the process yield of LSI (large-scale integration) chips. Redundant functions are used at present for storage chips in which more than the required number of cells and bit lines are implemented. After testing, the functional lines are selected. To the extent to which this method has been proposed for logic chips [*], there are only very few applications having repeatedly the same function on a chip.