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First level conductors L(1), L(2) and L(3) are supported by oxide Isolation 4 on doped silicon substrate 5. The second level metal is isolated by oxide 6 from L(1), L(2) and L(3).
English (United States)
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Reduction Of Capacitive Coupling Between Adjacent Dielectrically
First level conductors L(1), L(2) and L(3) are supported by oxide Isolation 4
on doped silicon substrate 5. The second level metal is isolated by oxide 6 from
L(1), L(2) and L(3).
The undesired capacitive coupling between L(1), L(2) and L(3) is minimized
by doped silicon ridges 7 and 8 which are extensions of doped substrate 5
through oxide 4 Into proximity with L(1), L(2) and L(3).
Ridges 7 and 8 function as shielding to reduce the coupling between L(1),
L(2) and L(3) without providing as high a capacitance as would occur if L(1), L(2)
and L(3) were brought closer to the substrate 5. The resulting reduction in cross-
talk between L , L and L permits closer spacing therebetween, while maintaining
acceptable noise tolerances. Additional shielding could be provided by the
extension of ridges 7 and 8 by polysilicon deposition or by counter Inking the
oxide 4 (by etching) prior to the deposition of L(1), L(2) and L(3).
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