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Planer Metal Interconnections By Backfilled Quartz Disclosure Number: IPCOM000066895D
Original Publication Date: 1979-May-01
Included in the Prior Art Database: 2005-Feb-20

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Logan, JS Mauer, JL Zielinski, LB [+details]


Multilevel metal insulator structures (three or more levels of metal) for semiconductor device fabrication, must have as little topography as possible, especially if small dimensions are to be maintained on all levels. This process enables the making of a planar multilevel structure using sputtered SiO(2) as the insulator.