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Method For Forming Shallow Junction Semiconductor Devices

IP.com Disclosure Number: IPCOM000066897D
Original Publication Date: 1979-May-01
Included in the Prior Art Database: 2005-Feb-20

Publishing Venue

IBM

Related People

Authors:
Antipov, I [+details]

Abstract

As P/N junctions become very shallow and base widths very narrow, the practice of butting the emitters against recessed isolation oxide in transistor integrated circuits becomes more difficult. Even a small overetching of the emitter openings also overetches the adjacent isolation oxide which may lead to emitter-to-collector shorts or lower punchthrough voltage.