Browse Prior Art Database

Processor To Processor Communications

IP.com Disclosure Number: IPCOM000067021D
Original Publication Date: 1979-Jun-01
Included in the Prior Art Database: 2005-Feb-20

Publishing Venue

IBM

Related People

Authors:
Breitenbach, RC Reed, DG [+details]

Abstract

A plurality of digital processors, such as CPU 1, CPU 2, etc., often share a common memory for data processing and control operations. Within the common memory, message areas may be assigned. For example, 1-2 may be the message area for transfer messages from CPU 1 to CPU 2. Similarly, 2-1 in the common memory can be a message area for transferring messages from CPU 2 to CPU 1. In general, an alert 1-2 line indicates that CPU 1 wants to send a message to CPU 2. This alert line is activated after CPU 1 has deposited a message in the message area 12. Similarly alert line 2-1 alerts CPU 1 that CPU 2 has deposited a message in common memory message area 2-1.