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This input circuit for an optical scanner provides high sensitivity photodiode response signals for analog to digital image processing.
English (United States)
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Input Circuit for Analog To Digital Light Sensitive Detector
This input circuit for an optical scanner provides high sensitivity photodiode
response signals for analog to digital image processing.
Photodiode D1 is part of an area scanner and initially is precharged with a
reverse bias potential by restore pulse R such that distributed capacitance C1
and node V1 are about one threshold voltage drop (Vt) below the maximum
potential of ramp voltage pulse VR. During precharge, VR is at its maximum
value and T2 charges node V2 and its capacitance to about VR-2Vt, which is
greater than the threshold of T3 such that the output is near ground. After a
suitable integration period, the potential on V1 is reduced as a function of the
light falling on D1.
At the end of the integration period, VR is ramped toward ground at a fixed
rate. The point at which nodal capacitance C2 begins to discharge is a function
of V1 at the time VR starts to fall after VR falls to one Vt below the precharge
potential of V2. The V2 charge over time period t equals -B2t/3/ /6C2, where B2
is the beta of T2. The rate at which V2 charges equals -B2t/2/ /2C2. Thus, when
the circuit is designed such that C1 and C2 are relatively small, the sensitivity of
the detector to light is maximized.
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