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Automatic Conversion of Physical Design Data Between Dissimilar FET Processes

IP.com Disclosure Number: IPCOM000067082D
Original Publication Date: 1979-Jun-01
Included in the Prior Art Database: 2005-Feb-20

Publishing Venue

IBM

Related People

Authors:
Devine, WT Kelly, GJ Kluga, DA Wood, RA [+details]

Abstract

In semiconductor device manufacture, many process steps involve downward diffusion or etching through openings in masks. The masks define the geometry of the resulting diffusion or etched hole. During the process of downward mechanical or chemical actions, a lateral component of mechanical or chemical action also occurs, making the resultant geometry either larger or smaller than the physical dimensions of the mask. Compensation, called bias, for the lateral action of a process step is often provided by computer programs which generate the mask openings slightly undersized or slightly oversized depending on the direction of lateral action.