Browse Prior Art Database

Memory Address Input And Decoder Circuit

IP.com Disclosure Number: IPCOM000067249D
Original Publication Date: 1979-Jul-01
Included in the Prior Art Database: 2005-Feb-20

Publishing Venue

IBM

Related People

Authors:
Kemerer, DW [+details]

Abstract

This address input true/complement generator and decoder circuit enables faster decoding time for memory components using transistor transistor logic (TTL) inputs.