Thermal Enhancement Of Integrated Stacked Modules
Original Publication Date: 1979-Jul-01
Included in the Prior Art Database: 2005-Feb-20
The cross-section illustrated by Fig. 1 represents an arrangement previously disclosed in the IBM Technical Disclosure Bulletin 21, 2318 (November 1978). As shown, the top substrate of a stacked assembly is inverted. An integrated seal and signal band spacer 1 is bonded in a sandwich-like structure between lower substrate 2 and upper substrate 3, thus creating a hermetically sealed cavity containing the upper and lower chip populations 4.