Dynamic Double-Bit Partitioner
Original Publication Date: 1979-Jul-01
Included in the Prior Art Database: 2005-Feb-20
This dynamic double-bit partitioner circuit generates dynamically four outputs and is capable of driving substantial capacitive loads with low DC power. This circuit requires no inverters to generate the inverse of the two inputs A and B as does the standard partitioner, rather it uses its own internal nodes as inputs to the next stages.