Browse Prior Art Database

Logical Analysis Test Device

IP.com Disclosure Number: IPCOM000067359D
Original Publication Date: 1979-Jul-01
Included in the Prior Art Database: 2005-Feb-20

Publishing Venue

IBM

Related People

Authors:
Battey, GL Chan, FC Hall, WA Schuelka, DJ [+details]

Abstract

The tester is a device that supports a set of logical problems which appear as a matrix of rows and columns of AND gates with positive logic on a problem card or overlay (Fig. 1). One of the gates within the matrix is predetermined to be malfunctioning. The device 10 (Fig. 3) includes a face 9 from which projects a ten-by-ten matrix of probe points. The probe points are cylindrical bosses which present an upper circular electrical contact surface.