Verification Of Asynchronous Circuits
Original Publication Date: 1979-Jul-01
Included in the Prior Art Database: 2005-Feb-20
In high performance machine design with short clock cycle times, the problem of assuring that clock pulses arrive at their destinations in synchronism is becoming more acute. This is because propagation delays between machine subsystems are approaching (even exceeding) the clock cycle. An important alternative to clocked sequential logic involves self-clocking (asynchronous) circuits. which reduce the necessity for global synchronized clock signals.