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Stack Structure For Mixed Technology Thermal Enhancement

IP.com Disclosure Number: IPCOM000067452D
Original Publication Date: 1979-Aug-01
Included in the Prior Art Database: 2005-Feb-20

Publishing Venue

IBM

Related People

Authors:
Darrow, RE DeMaine, FJ Petrozello, JR Tomek, RE [+details]

Abstract

Present economic and technology considerations dictate that it may be necessary to mount chips of varying heights on the same substrate. Also, when a large size substrate is used, an undesirable substrate bow may occur. In terms of thermal enhancement in which grease is placed in the cap between the chip and the module can, these factors necessitate an increase in the range of gap thickness which results in an undesirable increase in the thermal resistance of the parallel heat transfer path.