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Quasi-Transparent Refresh Mechanism For Dynamic Memories In Microprocessor Environment

IP.com Disclosure Number: IPCOM000067489D
Original Publication Date: 1979-Aug-01
Included in the Prior Art Database: 2005-Feb-20

Publishing Venue

IBM

Related People

Authors:
Glaise, R [+details]

Abstract

A microprocessor system is associated with a main memory wherein the instructions to be executed are stored. The operation of such a system consists first in fetching an instruction at a given address within the memory, and then executing the instruction. The execution can lead to making a decision on the new address as to where to fetch the next instruction, or more often the next sequential instruction is fetched and executed.