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Voltage Multiplier

IP.com Disclosure Number: IPCOM000067498D
Original Publication Date: 1979-Aug-01
Included in the Prior Art Database: 2005-Feb-20

Publishing Venue

IBM

Related People

Authors:
Remshardt, R Schettler, H Schumacher, H Zuehlke, R [+details]

Abstract

In many cases it is expedient to generate on the chip proper the semiconductor chip voltages exceeding the maximum power supply voltage. For this purpose, a bipolar circuit, in accordance with the block diagram, is used which generates from a low supply voltage a multiple of that voltage with the aid of a ring oscillator or a periodic voltage (clock). The circuit consists of a number of cascade-connected stages each with one series-connected diode D and a capacitance C connected in parallel. Charging and discharging of the capacitances C is controlled via a ring oscillator which, in this example, has three inverters I for each stage and an output node 7 fed back to input node 0.