Browse Prior Art Database

Fast Multichip Memory System With Power Select Signal

IP.com Disclosure Number: IPCOM000067501D
Original Publication Date: 1979-Aug-01
Included in the Prior Art Database: 2005-Feb-20

Publishing Venue

IBM

Related People

Authors:
Blum, A Gschwendtner, J [+details]

Abstract

Memory systems with a plurality of storage chips have a total access time which is determined by two delay factors, the first being attributable to chip selection and the second to the actual time required for accessing the chip storage cells.