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Fast Multichip Memory System With Power Select Signal Disclosure Number: IPCOM000067501D
Original Publication Date: 1979-Aug-01
Included in the Prior Art Database: 2005-Feb-20

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Blum, A Gschwendtner, J [+details]


Memory systems with a plurality of storage chips have a total access time which is determined by two delay factors, the first being attributable to chip selection and the second to the actual time required for accessing the chip storage cells.