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Static Random-Access Memory Double Polycrystalline Silicon Contact Method

IP.com Disclosure Number: IPCOM000067831D
Original Publication Date: 1979-Oct-01
Included in the Prior Art Database: 2005-Feb-20

Publishing Venue

IBM

Related People

Authors:
Dockerty, RC [+details]

Abstract

The resistor load, six-device static random-access memory process requires four masks for electrical contacts: 1) Polycrystalline silicon first layer (Poly I) buried contact; 2) Poly I - Polycrystalline silicon second layer (Poly II) buried contact; 3) Partial substrate contact; 4) Poly I, Poly II, N+ and substrate contact.