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The device shown in Figs. 1A and 1B is used for testing the 2n logical combinations of n-bit digital-to-analog converter (DAC) 1.
English (United States)
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Digital-To-Analog Converter Automatic Test
The device shown in Figs. 1A and 1B is used for testing the 2n logical
combinations of n-bit digital-to-analog converter (DAC) 1.
At the beginning of the test. the start button is closed,
setting latch L. Counter 2 begins to count so that the inputs of
the DAC are sequentially activated through the outputs of counter 2.
Consequently, as shown in the timing diagram, a ramp signal
comprising n steps is generated at the output of the DAC. If no
error has occurred during the conversion, there is no discontinuity
in the DAC output which is continuously increasing.
The DAC output is fed to two sample and hold circuits SAH1 and SAH2,
sampled by two signals B1 and B2 generated from the clock signal through
The logic circuit of Fig. 1B generates the test signal from the outputs of
SAH1 and SAH2. Comparators C1 and C2 make comparisons between
successive steps of the DAC output, as shown in the timing diagram. If no error
occurs during DAC operation, AND gates 5, 6 and OR gate 7 provide a regular
pulse train (shown in the drawing) to counter 4. Counter 4 counts the positive
variations of the level at the output of DAC 1. If 2/2/ variations occur. the light-
emitting diode (LED) lights, indicating a correct operation of the converter.
If an error has occurred, counter 4 never reaches the value 2n, since it is
reset by counter 2 when all the combinations at the inputs of DAC 1 have been